IBM and Siemens Announce a Nanostack Transistor Research Partnership on November 13: The Current 7 Angstrom Node Packs Nearly 100 Billion Transistors Into a Fingernail-Sized Area
IBM and Siemens announced a research partnership on November 13, 2026 to advance IBM's three-dimensional nanostack transistor design beyond the 7 angstrom node. Nanostack is a three-dimensional, nanosheet-based design that vertically stacks and staggers transistors. The work focuses on the design, simulation and lithography techniques needed for nanostack generations beyond the current node. At its current 7 angstrom node, nanostack packs nearly 100 billion transistors into a space the size of a fingernail, and allows different material combinations within each stacked layer, according to the announcement. The two companies will develop advanced virtual models of nanostack to model performance and address fabrication challenges before chips are built. IBM unveiled the nanostack architecture earlier in 2026 and demonstrated its viability. The announcement does not state the performance gains expected from the design or when the next node will be reached. The architecture is designed to support the logic scaling needed for AI and other emerging technologies over the coming decade.
(Source: IBM)
Source: IBM
Published by GSM · USA (original Chinese edition)
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